library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity counter is
port(clk1:in std_logic;--1Hz的信号
	clr:in std_logic;
	settime:in std_logic;
	qin1:in std_logic_vector(23 downto 0);--来自set实体的钟的8421编码的数字
	qout:out std_logic_vector(23 downto 0));
end;

architecture art of counter is
signal temph1:std_logic_vector(3 downto 0);
signal temph2:std_logic_vector(3 downto 0);
signal tempm1:std_logic_vector(3 downto 0);
signal tempm2:std_logic_vector(3 downto 0);
signal temps1:std_logic_vector(3 downto 0);
signal temps2:std_logic_vector(3 downto 0);
signal flag:std_logic;
begin
p1:process(settime,clr,clk1,qin1)
     begin
     if( clk1'event and clk1='1')then
            if(clr='1')then
            temph1<="0000";
            temph2<="0000";
            tempm1<="0000";
            tempm2<="0000";
            temps1<="0000";
            temps2<="0000";
            
            elsif(settime='1' )then
                 temph1<=qin1(23 downto 20);
                 temph2<=qin1(19 downto 16);
                 tempm1<=qin1(15 downto 12);
                 tempm2<=qin1(11 downto 8);
                 temps1<=qin1(7 downto 4);
                 temps2<=qin1(3 downto 0);
            else
                if(temps2<"1001")then
                        temps2<=temps2+1;
                    end if;
                        if(temps1<"0101" and temps2="1001" )then
                        temps1<=temps1+1;
                        temps2<="0000";
                    end if;

                if(tempm2<"1001" and temps1="0101" and temps2="1001" )then
                        tempm2<=tempm2+1;
                        temps1<="0000";
                        temps2<="0000";
                    end if;

                if(tempm1<"0101" and tempm2="1001" and temps1="0101" and temps2="1001" )then
                    tempm1<=tempm1+1;
                    tempm2<="0000";
                    temps1<="0000";
                    temps2<="0000";
                    end if;

                if(temph1<"0010" and temph2<"1001" and tempm1="0101" and tempm2="1001" and temps1="0101" and temps2="1001")then
                    temph2<=temph2+1;
                    tempm1<="0000";
                    tempm2<="0000";
                    temps1<="0000";
                    temps2<="0000";
                    end if;

                if(temph1<"0010" and temph2="1001" and tempm1="0101" and tempm2="1001" and temps1="0101" and temps2="1001" )     then        
                    temph1<=temph1+1;
                    temph2<="0000";
                    tempm1<="0000";
                    tempm2<="0000";
                    temps1<="0000";
                    temps2<="0000";
                    end if;

                if(temph1="0010" and temph2<"0011" and tempm1="0101" and tempm2="1001" and temps1="0101" and temps2="1001" )then
                    temph2<=temph2+1;
                    tempm1<="0000";
                    tempm2<="0000";
                    temps1<="0000";
                    temps2<="0000";
                    end if;

                if(temph1="0010" and temph2="0011" and tempm1="0101" and tempm2="1001" and temps1="0101" and temps2="1001" )then
                    temph1<="0000";
                    temph2<="0000";
                    tempm1<="0000";
                    tempm2<="0000";
                    temps1<="0000";
                    temps2<="0000";
                end if;
            end if;
        end if;--clr

    qout<=temph1 & temph2 & tempm1 & tempm2 & temps1 & temps2;
end process; 
end art;

